N-nary optical semiconductor transistor and an optical AND gate

ABSTRACT

An N-nary photonic transistor (PT) based on a heterojunction optical semiconductor microstructure is presented. The PT has one control signal input, one data signal input, and one output. The lights for each input can be one of the wavelengths within the N number (N-nary) of predetermined lightwaves. The output light of the PT is determined by the inputs in accordance with the switching function of the PT. The PT can be used to construct either N-nary digital logic gates or binary Boolean logic gates. For the N-nary system, both the wavelength domain and intensity domain of the lights are used which forms a two dimensional logic system. An optical AND gate, which can be used as either N-nary or binary, is constructed using the current photonic transistor, which is also presented herein.

This application is a continuation-in-part of U.S. ProvisionalApplication No. 60/778,394, filed Mar. 3, 2006.

FIELD OF THE INVENTION

The present invention relates to the field of optical (or photonic)computing, N-nary digital logic, photonic transistor, and opticalsemiconductor logic gates.

BACKGROUND OF THE INVENTION

Similar to digital electronics, digital photonic circuits/chips can bebuilt using logic gates, in which light signals, instead of electricalones, are used to drive the device. When using light, we have twodimensions available for information encoding and computing, which arethe light intensity and the wavelength. In other words, we can use N(N≧1) number of lightwaves, and each one can be at either zerointensity, to represent the binary 0's, or a pre-selected highintensity, to represent the binary 1's. For computing purposes, we canuse either the intensities to represent information or the wavelengthsor both. If the intensity is used for information encoding, one can havea multiple binary system with each lightwave having two intensities, onefor 0's and the other for 1's. If only one wavelength is used in thiscase, it becomes a single binary system. On the other hand, if thewavelengths are used to encode information, in this case N≧2, we canhave an N-valued system with each lightwave being at a constantintensity to be one of the values in the N-valued digital system. If twowavelengths are used in this case, it also becomes a binary system, withone wavelength representing the 0's and the other representing the 1's.However, if both the intensities and the wavelengths are used forinformation representation and manipulation, we can have a twodimensional logic system that not only provides high computationcapacity but also can be constructed in a way so that the transitionalfunctions among the digital values in the system to be simple andimplantable by optical semiconductors. Based on these considerations, weconstructed an N-valued digital logic system that defines the transitionfunctions among the N values to achieve N-nary computing using bothlight intensities (only two intensities are used) and wavelengths (Nnumber of wavelengths with N≧1). An N-nary Digital Photonic (NDP) systemis established by implementing the transition functions through N-naryphonic logic gates. Using the photonic logic gates one can constructN-nary digital logic photonic circuits/devices. This system wasdisclosed in U.S. Pat. No. 6,778,303. An N-nary Optical Random AccessMemories (O-RAM), according to the N-valued digital logic, was disclosedin U.S. Pat. No. 6,647,163. The design processes of any digital opticaldevices using the logic gates are similar to those of the binary Booleandigital system. But, the logic used is the N-valued digital logicinstead of the Boolean binary logic.

One approach of implementing the N-nary photonic logic gates is to firstdesign the photonic transistor (following the same naming convention ofdigital electronics), which is a micro-device that allows one lightwaveto switch on or off another lightwave. The transistors are then used toconstruct the photonic gates.

It is worth noting that N-valued logic is not unique. One can constructdifferent logic systems for different applications (Refer to Rescher,N., Many-valued Logic, McGraw-Hill 1969). The larger the N is chosen,the larger the number of logic systems that can be devised. When a logicsystem is designed for computing purposes, it requires that the logichave two fundamental properties: completeness and implementability. Thecompleteness means that the logic defines all necessary operators(transition functions) to achieve information storage and datacomputations, and the implementability means that the logic isimplementable by some kind of physical media, in order to be useful. TheNDP system disclosed in U.S. Pat. No. 6,778,303 was developed to satisfyboth these conditions. The key elements of implementing the NDP arelogic gates which in turn can be constructed by the herein disclosedN-nary photonic transistor.

This present invention is an N-nary photonic transistor (PT) based on aheterojunction optical semiconductor microstructure. The photonictransistor design and computer simulation results are presented. Thephotonic transistor design presented here has the features of beingsmall in size and power consumption, which makes it useful forintegrated photonic chips. An example of using the photonic transistorto construct an optical AND (O-AND) gate (Refer to U.S. Pat. No.6,778,303) is also presented.

SUMMARY OF THE INVENTION

An N-nary photonic transistor (PT) based on a heterojunction opticalsemiconductor microstructure is herein disclosed. The PT has one controlsignal input, one data signal input, and one output. The lights for eachinput can be one of the wavelengths within the N number (N-nary) ofpredetermined lightwaves. A special case, when one wavelength is usedfor both inputs, the current PT becomes a binary transistor. The PT canbe used to construct either N-nary digital logic gates or binary Booleanlogic gates. For the N-nary system, both the wavelength domain andintensity domain of the lights are used which forms a two dimensionallogic system. An optical AND gate, which can be used as either N-nary orbinary, is constructed using the current photonic transistor. Computersimulations using commercial software produced satisfactory results forboth the photonic transistor and the optical NAD gate.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1. The configuration of the photonic transistor

FIG. 2. The logic symbol of the photonic transistor

FIG. 3. The cross-section of the photonic transistor

FIG. 4. Control input signal (λ=1560 nm) for simulation case-1

FIG. 5. Data input signal (λ=1550 nm) for simulation case-1

FIG. 6. The output signal of the photonic transistor (λ=1550 nm) ofsimulation case-1

FIG. 7. Control input signal with wavelength of 1540 nm for simulationcase-2

FIG. 8. The output signal of the photonic transistor (λ=1550 nm) forsimulation case-2

FIG. 9 The O-AND gate construction using the herein disclosed photonictransistor

FIG. 11. The logic operator for the O-AND gate

FIG. 10. The logic symbol of the O-AND gate

FIG. 12. The signal input of the O-AND gate simulation case-1

FIG. 13. The control input of the O-AND gate simulation case-1

FIG. 14. The O-AND gate output of the simulation case-1

FIG. 15. The O-AND control input (λ=1550 nm) the O-AND gate simulationcase-2

FIG. 16. The binary output of O-AND gate simulation case-2

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Overview

It is well known that SOAs can be used for wavelength conversions (Referto: Terji Durhuus, et al, “All-Optical Wavelength Conversion bySemiconductor Optical Amplifiers,” in Journal of Lightwave Technology,Vol. 14, No. 6, June 1996, pp. 942-954; T. Durhuus et al, “All-OpticalWavelength Conversion by SOA's in a Mach-Zehnder Configuration,” in IEEEPhotonics Technology Letter, Vol. 6, No. 1, January 1994, pp. 53-55;Byongjin Ma and Yoshiaki Nakano, “Realization of All-Optical WavelengthConverter Based on Directionally Coupled Semiconductor OpticalAmplifiers,” in IEEE Photonics Technology Letters, Vol. 11, No. 2,February 1999; B. Dagens et al, “Design Optimization of All-ActiveMach-Zehnder Wavelength Converters,” in IEEE Photonics TechnologyLetter, Vol. 11, No. 4, April 1999, pp. 424-426; Masumi Saitoh, et al,“Static and Dynamic Characteristics Analysis of All-Optical WavelengthConversion Using Directionally Coupled Semiconductor OpticalAmplifiers,” in IEEE Journal of Quantum Electronics, Vol. 36, No. 8,August 2000, pp. 984-990.) and wavelength switching functions (Refer to:H. Ju, et al “Ultrafast All-Optical Switching by Pulse-InducedBirefringence in a Multi-Quantum Well Semiconductor Optical Amplifier,”in Proc. CLEO/IQEC 2004/2003, pp. CFJ1-1-CFJ1-3; and H. Ju et al,“SOA-based All-Optical Switch with Subpicosecond Full Recovery,” inOPTICAL EXPRESS, Vol. 13, No. 3, February 2005, pp. 942947). Some binaryBoolean logic gates based on wavelength switching functions have alsobeen demonstrated (Refer to Youlong, et al, “Optical XOR and NXOR LogicOperations with Erasable Self-pumped Phase Conjugation,” OptikInternational Journal for Light and Electron Optics, Vol. 110, No. 2,1999, pp. 89-93; T. Houbavlis, et al, “All-Optical XOR in aSemiconductor Optical Amplifier-Assisted Fiber Sagnac Gate,” in IEEEPhotonics Technology Letters, Vol. 11, No. 3, March 1999, pp. 334-336).

In a number of US patents, all optical Boolean logic gates using variesmethods have been disclosed (Refer to: U.S. Pat. Nos. 7,145,704;6,943,925; 6,804,047; 6,522,462; 6,151,428; 6,005,791; 5,757,525;5,144,375; 5,132,983; 4,811,258). Also, a number of methods of Booleanoptical transistors have been disclosed (Refer to: U.S. Pat. Nos.6,943,929; 6,847,054; 6,788,838; 5,502,585; 5,001,523; 4,403,323;4,382,660; 4,216,485).

The N-nary Optical Semiconductor Transistor Design

A wideband photonic transistor (PT) for the N-nary Digital Photonic(NDP) system (Refer to U.S. Pat. No. 6,778,303), based on aheterojunction traveling waveguide structure, is herein presented. FIG.1 shows the external configuration (inputs and output ports) of the PT.The PT 101 has one signal input 102, one control input 103, and one output 104. The signal input of the PT takes the data signals and thecontrol input takes the control signals. The signals, for either thecontrol input or the data input, can be any lightwave λ_(i) with λ_(i)

S(λ₁, λ₂, . . . λ_(N)), where S(λ₁, λ₂, . . . λ_(N)) is the set of thewavelengths from λ₁ to λ_(N), whereas the wavelength range from λ₁ toλ_(N) falls into the bandwidth of the PT. The intensities for eachlightwave can either be high, a predetermined intensity in the system,or zero (dark). The logic function of the PT which determines the outputof the PT for a given set of inputs is defined as: if there is no light(intensity=0) on the control input, the output of the PT will beidentical to the data input signal, in both wavelength and intensity.However, if one of the lightwaves λ_(i) with λ_(i)

S(λ₁, λ₂, . . . λ_(N)), presents on the control input (with theintensity at high), the output of the PT will be at low, with “low”being defined as lose to zero (dark). Having this specialmulti-wavelength switching function, the PT can then be used toconstruct N-nary logic gates designed for the NDP system. A specialcase, when only one wavelength is used (N=1), the N-nary logical gatesbecome the Boolean logic binary logic gates.

It is worthy to note that the herein described transistor is actually aninversed transistor compared with the traditional electrical transistorwhereas the transistor is switched to “on” when the control input is athigh. Here, the PT is switched to “on” when the control input is at low.But for simplicity, the herein described inversed-transistor is referredto as a transistor.

FIG. 2 shows the logic symbol of the N-nary photonic transistor. It hasone signal input 201, one control input 202, and one out put 203. An “S”204 is inserted in the signal input to signify that it is signal input,and a “C” 205 is inserted in the control input to signify that it is thecontrol input.

In order to make the PT practically useful, especially in integratedphotonic circuits/chips, the PT must have several important properties:(1) It should be wideband so that N number of wavelengths can be used;(2) It should have a small physical dimension so that a large number oftransistors can be integrated into one chip; (3) It should have smallpower consumption so that the total power consumption of the chip can bemanageable; and (4) It should be easy for future PT and waveguideintegrations. To meet these requirements, a simple heterojunctiontraveling waveguide structure is designed. FIG. 3 shows thecross-section of the PT, with 301 being the positive electrode, 302 thenegative electrode, 303 the N-Inp substrate, 304 the InGaAsP activeregion, 305 the insulator, 306 the P-Inp layer. This buried ridgearchitecture provides high confinement coefficients required the PT.

Computer Simulations

Photonic Transistor Simulation Case-1

The above described PT design was tested by computer simulations. Thecontrol input is generated by a bit generator and an amplitudemodulator. The bit sequence was chosen as 01010101. The correspondingcontrol signal is shown in FIG. 4. The wavelength for the modulator isproduced by a pump laser. The wavelength was chosen as 1560 nm in thiscase. The data signal input is also generated by a bit generator and anamplitude modulator. The bit sequence was chosen as 00110011, in orderto produce all of the possible combinations between the control inputand the signal input. The wavelength for the signal input was chosen as1550 nm. The corresponding signal waveform is shown in FIG. 5. Theoutput of the transistor is shown in FIG. 6. The wavelength of theoutput is identical to the signal input, which is 1550 nm in this case.

By comparing the control input and the data input with the outputsignals, we can see that the PT produces the required transitionfunctions, i.e. when the control input is a zero, the output equals tothe signal input, while the control input is high, the output is low.For example, when the time is at 1 ns, the control input signal is atzero, refer to FIG. 4, and the signal input is at high, refer to FIG. 5,the PT output is at high, refer to FIG. 6. When the time is at 1.4 ns,the control input is at high, the signal input is also at high, but thePT output is a low.

From FIG. 6, it can be seen that the low output signal of the PT isabout 30% of the output high signal. Ideally, the “low” should be atzero. But, due to the fact that the computer software simulates thecross-gain modulation mechanism of the heterostructure, it results aclose-to-zero output. Laboratory experiments have shown that there is“total-saturation” state whereas the output can be at zero when thecombined power of signal input and control input reach the saturationlevel of the structure.

From an application viewpoint, a “total-saturation” PT is ideal, but the“not-at-zero” low PT can also be used to construct N-nary logic gates.When using the ““not-at-zero” PTs to construct logic gates, the outputof the PTs can further manipulated that the output of the gates will beat either high or zero for each of the lightwaves used in the system.This will be discussed in the following section.

Photonic Transistor Simulation Case-2

In order to test the bandwidth of the transistor, a second experimentwas simulated by changing the wavelength of the control signal to 1540nm, while keeping the signal input to the transistor at the samewavelength, which is 1550 nm. FIG. 7 is the control signal waveform. Thenumerical simulated output signal of the transistor for this set ofinputs is given in FIG. 8. It can be seen that the output signalmaintained the same intensity as the previous test case where thecontrol input had a wavelength of 1560 nm. This indicates that thetransistor design has at least 20 nm bandwidth, from 1540 nm to 1560 nm.Therefore, N number of wavelengths within the range of 1540-1560 nm canbe chosen for the NDP system, if this transistor is used to constructthe N-nary photonic logic gates. The band gap between the wavelengths isdetermined by the I/O devices of the system. If a 0.4 nm gap is adopted,as used in some DWDM (Dense Wavelength Division Multiplexing) systems,this transistor will provide around 50 wavelengths for informationencoding and processing.

An Optical and (O-AND) Gate Constructed using the Current PhotonicTransistor

The O-AND Gate Design

As mentioned earlier, the above discussed photonic transistor can beused to construct logic gates. As an example, the PT is used toconstruct an N-nary optical AND (O-AND) gate. The logic function of theN-nary O-AND gate is defined as: If the control input has a zero (dark),the output will be zero; but, if any λ_(i) with λ_(i)

S(λ₁, λ₂, . . . λ_(N)) presents on the control input, the output will beequal to the signal input. Table 1 is the truth table of the O-AND gate.It is worth noting that the N-valued digital logic system is notsymmetric, unlike the Boolean logic. The roles of the control input andthe data input at the gate level in the NDP system are predefined.However, when only one wavelength is used, the O-AND gate not onlybecomes symmetric but also, importantly, becomes the standard Booleanbinary logic AND gate. The truth table of the binary O-AND gate is givenby Table 2. Since only one wavelength is used in the binary case, andthe high intensity represents 1 and the zero intensity represents 0,Table 2 can be rewritten into the standard binary format as shown inTable 3. TABLE 1 The truth table of the N-nary O-AND Signal inputControl input O-AND gate Output 0 0 0 0 λ_(i) 0 λ_(j) 0 0 λ_(j) λ_(i)λ_(j)

TABLE 2 the truth table of the binary O-AND as a special case Signalinput Control input O-AND gate Output 0 0 0 0 λ_(i) 0 λ_(i) 0 0 λ_(i)λ_(i) λ_(i)

TABLE 3 the standard binary form for the Binary O-NAD gat Signal inputControl input O-AND agte Output 0 0 0 0 1 0 1 0 0 1 1 1

FIG. 9 shows the design of the N-nary O-AND gate 900 which has onecontrol input 901, one signal input 902, and the output 903. The O-ANDgate consists of two PTs, PT-1 904 and PT-2 905, and two SOAs, SOA-1 906and SOA-2 907. The control signal to PT-1 is amplified by SOA-1 tocreate a power bias between the signal input and the control input toproduce high cross-gain modulation within PT-1, in order to make the lowoutput sufficiently low. PT-2 is identical to PT-1, in order to form aMach-Zehnder interferometer. The control input of PT-2 is set at aconstant zero, along with a 180° phase shifter 908, makes theMach-Zehnder interferometer formed by PT-1 and PT-2 have a destructiverecombination at the output. This destructive recombination of theMach-zehnder interferometer cancels the high output of PT-1, resultingin the output of the O-AND gate as defined in Table 1. SOA2 is used toamplify the output signal to reach the same level of the input.

The logic symbol of the O-AND gate is shown in FIG. 10. Similar to thephotonic transistor symbol, a “C” 1001 and an “S” 1002 is put on theinput lines to signify control input 1003 and signal input 1004respectively. However, when only one wavelength is used, the N-naryO-AND gate becomes a binary O-AND gate, in which case, the O-AND gate issymmetric. This means that one signal can be the control of the other,in exactly the same manner of Boolean logic.

FIG. 11 shows the operator symbol of the O-AND gate. A big “O” circlesaround the AND to signify optical, which distinguishes the optical ANDfrom the electrical AND.

The logic symbol, shown in FIG. 10, is used in photonics circuit designsin the same manner as the electrical AND gate symbol in electronicscircuits. The logic operator, shown in FIG. 11, is used in mathematicallogic manipulations in the same manner as those used the Booleanalgebra.

O-AND Gate Simulation Case-1

The O-AND gate design shown in FIG. 9 was simulated using computersoftware. FIG. 12 is the signal input for the O-AND gate, which isgenerated by an amplitude modulator powered by a 1550 nm CW laser. FIG.13 is the control input to the O-AND gate, which has the wavelength of1560 nm. The output signal of the O-AND gate is given in FIG. 14. Theresult matches the truth table of the O-AND gate shown in Table 1.

O-AND Gate Simulation Case-2

The binary case, when only one wavelength is used, was also tested atλ=1550 nm. The same control signal of 1550 nm wavelength, shown in FIG.13, was used. The signal input of 1550 nm is shown in FIG. 15. Theoutput of the binary O-AND gate is given by FIG. 16. It can be seen thatthe result displays a Boolean binary logic AND.

Numerous other embodiments of the invention are possible withoutdeparting for the scope of this document.

1. An N-nary photonic transistor (PT) that uses both the wavelengths andthe intensities of lights for digital information processing.
 2. TheN-nary photonic transistor of claim 1, wherein said wavelengths oflights can be N, with N≧1 being the number of lightwaves used in thesystem, wherein N is determined by the requirement of the system and thebandwidth of the PT.
 3. The N-nary photonic transistor of claim 1,wherein said intensities of the lights can be either low, close to dark,or high, a predetermined light intensity.
 4. The N-nary photonictransistor of claim 1, comprising: a transistor body, a control inputport, a signal input port, an output port; wherein the transistor bodycomprising a heterojunction traveling waveguide optical semiconductormicrostructure that comprises a pair of electrodes, an active region ofInGaAsP, a N-InP layer between the active region and the negativeelectrode, and a P-InP layer between the active region and the positiveelectrode. wherein the control input takes the control light signal, thesignal input port takes the data light signal, and the output portpresents the output of the PT in accordance with the control and datainputs and obeys the following truth table: Signal input Control inputPT Output 0 0 0 0 λ_(i) 0 λ_(j) 0 λ_(j) λ_(j) λ_(i) 0


5. The N-nary photonic transistor of claim 1, wherein only one lightwaveis used, N=1, it becomes a binary transistor that obeys the followingtruth table: Signal input Control input PT Output 0 0 0 0 1 0 1 0 1 1 10


6. An N-nary optical AND (O-AND) gate constructed using the hereindisclosed photonic transistor, comprising: an O-AND gate body, a controlinput port, a signal input port, an output port; wherein the O-AND bodycomprising two photonic transistors, two optical semiconductoramplifiers and a phase shifter; wherein the control input takes thecontrol light signal, the signal input port takes the data light signal,and the output port presents the output of the O-AND in accordance withthe control and data inputs and obeys the following truth table: Signalinput Control input O-AND gate Output 0 0 0 0 λ_(i) 0 λ_(j) 0 0 λ_(j)λ_(i) λ_(j)


7. The N-nary O-AND of claim 6, wherein only one lightwave is used, N=1,it becomes a binary O-AND that obeys the Boolean logic shown in thefollowing truth table: Signal input Control input O-AND agte Output 0 00 0 1 0 1 0 0 1 1 1